OrCAD and Allegro 17.40.004 Hotfix


OrCAD and Allegro 17.40.004 Hotfix

链接:https://pan.baidu.com/s/1CJk0rtjEKFQlypWfW06Nwg   提取码:5lk4
Fixed CCRs: SPB 17.4 HF004
CCRID Product ProductLevel2 Title
2181458 ADW DBEDITOR dbeditor - old version retained when using Copy-as
1809803 ADW PART_BROWSER Hyperlink support with pipe to shorten the path does not work in new Component Browser
2213946 ALLEGRO_EDITOR DFM DFM Copper Feature reporting Min shape width (positive) as 0 mils
2213976 ALLEGRO_EDITOR DFM DFM Cutout to shape reports a violation at 9.44 mils when rule is set to 8 mils.
2120228 ALLEGRO_EDITOR EDIT_ETCH Sliding vias containing dynamic teardrop jump away in unpredictable directions
2204713 ALLEGRO_EDITOR EDIT_ETCH Lag in commands when working with board in release 17.2-2016 and 16.6
2203244 ALLEGRO_EDITOR MULTI_USER Symphony team design error with intermittent crash on refreshing DB
2199583 ALLEGRO_EDITOR PLACEMENT Place Manual on fixed part causes crash.
2210240 ALLEGRO_EDITOR SCRIPTS View switching on the visibility tab does not work in script.
2209926 ALLEGRO_EDITOR UI_FORMS Issue with working layers form - cannot see all layers in one go.
2136023 APD BGA_GENERATOR 'add connect' does not snap to the BGA pins for padstacks other than SMD
1818908 APD OTHER axlGeoClosestPointOnArc produces incorrect results
2161871 APD REPORTS Net delay report is stuck on one net
2196327 CAPTURE BACKANNOTATE Error message while backannotating after swapping in PCB Editor
2210415 CAPTURE BACKANNOTATE Design Sync gives Error message when PCB Editor has used function swap, however it does swap the functions in schematic.
2186857 CAPTURE DRC DRC window reports each DRC warning twice
2195581 CAPTURE DRC Online DRCs to locate footprints from path relative to active board
2210489 CAPTURE DRC Waiving a DRC error in release 17.4-2019: Not listed in DRC windows
2214742 CAPTURE DRC Missing function for Waive DRCs in Find window in Capture in release 17.4-2019
2204814 CAPTURE LIBRARY CONNECTOR.OLB\CON2 has predefined footprint value in release 17.4-2019
2191753 CAPTURE ONLINEDRC Capture crashes when copying hierarchical block multiple times with Online DRC on
2199818 CAPTURE ONLINEDRC Online DRC reports error of missing pins with H-Part, hence does not perform Design Sync
2207327 CAPTURE ONLINEDRC Footprint are still listed as missing in Online DRC
2216323 CAPTURE ONLINEDRC Online DRC does not support parts with CLASS set to MECHANICAL
2197754 CONCEPT_HDL CORE Note command results in alignment issue due to spaces added to the end of words
2076622 CONCEPT_HDL CREFER DE-HDL crashes on setting 'Generate Cross References for all nets' from 'Cross Referencer Options' to run CRefer
2088599 CONCEPT_HDL CREFER Crefer generating schematic with wrong RefDes without suffix
2208007 CONCEPT_HDL OTHER Pin Names not backannotating to Allegro Design Entry HDL
2213854 CONSTRAINT_MGR ANALYSIS Attempting to add a via to a .dra will crash Allegro with no dump file generated.
2195821 CONSTRAINT_MGR UI_FORMS Length values are light gray in Net > RPD worksheet in CM
2195950 CONSTRAINT_MGR UI_FORMS UI issue: CM auto scrolling to the left when net name is selected
2204781 EAGLE_TRANSLATOR PCB_EDITOR PCB Translator stacks all of the incoming components in the lower left corner of the board.
2207844 PULSE UNIFIED_SEARC Cannot access third-party components using valid credentials from Capture
2214339 SIG_EXPLORER SIMULATION SigXplorer crashes when using the 'Manage LayerStacks' option.
2186309 SIP_LAYOUT DEGASSING Degassing does not add voids to the entire shape
2215871 SIP_LAYOUT DEGASSING Teardrop prevents the shape degassing command from completing
2213471 SYSTEM_CAPTURE CUSTOM_TEXT Custom variables become read-only after a note is added to the schematic.
2169359 SYSTEM_CAPTURE IMPORT_DEHDL_ Unable to import the project sheets, fails for a page
1899491 SYSTEM_CAPTURE PROPERTY_EDIT Cannot change project variables
2168546 SYSTEM_CAPTURE PROPERTY_EDIT Unable to exit edit mode after editing RefDes value on canvas

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